ASIC RTL Design Technical Lead

Role Summary

A senior technical contributor that drives end-to-end delivery of SerDes solution directly contributing to and coordinating implementation and optimization across multiple teams. The position involves interfacing with software and hardware engineering teams to plan, develop and optimize use cases in the cutting edge of SerDes Technology.

Experience Level

Level - Mid-Career

Responsibilities

As an ASIC Design Engineer, your responsibilities span various aspects of SOC design:

• Write microarchitecture and/or design specifications
• Design, implement, and debug complex logic designs
• Integrate complex IPs into the SOC
• Collaborate with diverse SOC Design teams including Verification, Emulation, STA, and Physical Design
• Support front end integration activities (Lint, CDC, Synthesis, and ECO)
• Implement design automation via Python or other languages
• Collaborate with software and systems teams to ensure a high-quality system

Requirements

Preferred qualifications include:

• Hands-on experience in all aspects of the chip development process with proficiency in front end tools and methodologies
• Experience in writing specifications and converting them to design
• Knowledge of system architecture, CPU & IP Integration, and power and clock management designs is desirable
• Experience in front-end implementation tasks such as synthesis, timing, area/power analysis, linting, and logic equivalence checks
• Experience in low-power design techniques such as clock- and power-gating is a plus
• Excellent communication and collaboration skills

Education Requirements

Bachelor’s or Master’s degree in a related discipline is preferred.