ASIC Physical Design Staff Engineer

Role Overview

The position requires a skilled ASIC Physical Design Engineer with a minimum of 5 years relevant experience, particularly focusing on implementing DDR and HBM PHYs for customer ASICs and SOCs. You will work within a dedicated engineering team and engage directly with project design engineering.

Position Summary

As an engineer at Synopsys, your role involves significant contributions to complex ASIC designs, primarily through synthesis, physical design, and verification. You'll be managing critical tasks that ensure high performance in silicon chip designs, updating project statuses regularly, and guiding junior engineers within the team.

Experience Level

This position is designated for experienced professionals, specifically those at a mid-career level, who possess nuanced knowledge in advanced ASIC physical design technologies.

Key Responsibilities

• Implement DDR and HBM PHYs as part of the Hardening service line for customer ASICs.
• Perform synthesis and physical design activities along with design for test and ATPG processes.
• Serve as a senior member or project design engineer, facilitating collaboration across internal and external teams.
• Maintain communication with management regarding project progress and team dynamics.
• Provide mentorship and technical guidance to junior design engineers.

Essential Qualifications

• Over 5 years in ASIC Physical Design with proven proficiency in tools like ICC2/FC and ICV.
• Experienced in utilizing cutting-edge CAD tools and technologies, including FinFet.
• Strong problem-solving attributes and an independent approach to project challenges.
• Excellent communication skills for effective collaboration and reporting.

Education Requirements

While specific degrees are not outlined, a background in Electrical Engineering or Computer Engineering, combined with relevant work experience, is typically expected for roles of this nature.