ASIC Design Engineer, High Speed IO

Role Overview

As an ASIC Design Engineer for High Speed IO at NVIDIA, you will engage in developing high-speed communication protocols for next-generation Automotive chips. This role entails deep involvement in RTL design, micro-architecture development, and coordination across teams including verification and validation.

Experience Level

This position is for candidates with 2 or more years of experience in designing and implementing complex digital units and micro-controller based subsystems in high-tech environments.

Key Responsibilities

• Own the micro-architecture and RTL development of design modules.
• Analyze system implications and make architectural trade-offs regarding performance, power, and feature requirements.
• Collaborate with HW architects to define and optimize critical design features.
• Work closely with verification teams to ensure that all implemented features are correct and functional.
• Partner with timing, VLSI, and physical design teams to meet timing requirements and ensure routability.

Essential Requirements

• BTech/MTech degree in a relevant field.
• 2+ years of experience in ASIC design, knowledge of security standards and architectures preferred.
• Ability to communicate and collaborate effectively in a cross-cultural and matrixed team environment.
• Proficient debugging, analytical, and problem-solving skills.
• Strong interpersonal skills and teamwork capabilities.

Education Requirements

Bachelor's or Master's degree in relevant engineering disciplines is mandatory.