Applications Engineering, Principal Engineer

Job Title

Applications Engineering, Principal Engineer

Role Summary

Senior applications engineering role responsible for driving product development and high-performance-computing (HPC) reference flows in partnership with R&D and key customers. The role focuses on synthesis, place-and-route, signoff closure, and demonstrating differentiated PPA on advanced CPU/GPU/NPU designs.

The engineer will provide technical leadership for worldwide benchmarks and deployments, support NPI activities, and act as an extension of customer design teams from RTL to GDSII.

Experience Level

Senior. The posting indicates a minimum of 5+ years of relevant experience and references senior/staff-level expectations (10+ years) for principal-level engagements and customer leadership.

Responsibilities

Primary responsibilities include technical customer engagement, methodology development, and hands-on flow execution for advanced silicon designs.

• Collaborate with R&D to develop and deploy advanced HPC reference flows and new methodologies.
• Demonstrate differentiated PPA results on CPU, GPU, and NPU designs and participate in critical worldwide benchmarks and deployments.
• Provide technical support to global customers to resolve PPA bottlenecks and design closure issues.
• Automate and optimize flows using scripting (Perl, Tcl) and other tooling.
• Support NPI activities to accelerate deployment and business growth.
• Work at block and subsystem levels on synthesis, physical implementation, and design closure.
• Act as an extension of customer teams to implement designs from RTL to GDSII and define sign-off requirements and margins against foundry rules.
• Participate in paid consulting or onsite engagements to solve high-value HPC PPA challenges (as required by customers).

Requirements

Must-have technical skills and experience to perform the role.

Must-have:

• Hands-on experience with synthesis and place-and-route (P&R) tools and signoff closure workflows.
• Proficiency with EDA tools such as Synopsys Design Compiler (DC), IC Compiler II (ICC2), and Fusion Compiler.
• Knowledge of placement and routing rules, including at advanced technology nodes (5nm and below).
• Experience with scripting languages such as Perl and Tcl for automation.
• Strong understanding of ASIC design flow, VLSI fundamentals, and CAD development.
• Proven ability to debug flow, design, and PPA issues and drive closure.
• Experience leading tape-out projects (example: >3M instance count) and managing project activities.
• Good cross-team communication skills and ability to support worldwide engagements.

Nice-to-have:

• Direct experience with advanced CPU, GPU, or NPU designs and high-performance compute subsystems.
• Prior experience performing or participating in industry benchmarks and large deployments.
• Consulting or customer-facing engagement experience delivering high-value commercial outcomes.

Education Requirements

BS or MS in Electrical Engineering or Computer Science (the posting specifies BS/MS in EE or CS). The posting also indicates 5+ years of relevant experience as a work-experience expectation for the role.

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About the Company

Company: Synopsys

Headquarters: Mountain View, California, United States

Leading electronic design automation (EDA) and semiconductor IP company delivering software, tools, and IP for chip design, verification, and software security. Synopsys helps semiconductor and system companies optimize performance, power, and area and accelerate product development across advanced process nodes.