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Analog Layout Apprenticeship

Synopsys
Internship
On-site
Bengaluru, India
Level - Entry or Early Career

Role Summary

This is a full-time apprenticeship program focused on analog layout development within a dynamic team environment. Apprentices will engage in hands-on projects and collaborate closely with layout engineers while advancing their technical skills and professional growth.

Experience Level

Ideal candidates are fresh graduates from the class of 2024 or 2025 with limited internship experience, particularly those who are not enrolled in any postgraduate programs or currently employed.

Responsibilities

  • Assist in developing analog and mixed-signal CMOS layouts.
  • Work with layout engineers to understand and implement designs according to schematics.
  • Support resolving layout challenges and partake in physical verification flows.
  • Learn and adhere to standard layout methodologies and best practices.
  • Coordinate effectively with team members to ensure the timely completion of layout tasks.

Requirements

  • B.E./B.Tech in Electronics, Electrical, Instrumentation, ECE, EEE, VLSI, or related fields.
  • Must be a recent graduate from the years 2024 or 2025.
  • Not currently in any M.Tech programs and not employed full-time.
  • Basic understanding of CMOS layout techniques and design rules.
  • Proficient in MS Office Suite (Excel, Word, PowerPoint).
  • Willingness to learn new tools and methodologies.
  • Strong analytical skills, teamwork capability, and effective communication.

Education Requirements

A degree (B.E./B.Tech) in relevant fields such as Electronics, Electrical Engineering, or VLSI is required.