Analog Layout Apprenticeship

Role Summary

The Analog Layout Apprenticeship at Synopsys provides an opportunity for recent graduates to work on analog and mixed-signal CMOS layouts. This hands-on position allows apprentices to collaborate closely with experienced layout engineers and gain valuable exposure to the design process.

Experience Level

This position is geared towards entry-level professionals, specifically fresh graduates from the classes of 2024 or 2025.

Responsibilities

The apprentice will be responsible for the following tasks:

• Support layout development of analog and mixed-signal CMOS layouts.
• Collaborate with layout engineers to interpret schematics and implement corresponding layouts.
• Assist in resolving layout issues and participate in physical verification processes.
• Adhere to standard layout methodologies, best practices, and tool flows.
• Work with team members to ensure timely completion of layout assignments.

Requirements

Candidates should meet the following criteria:

• B.E./B.Tech in Electronics, Electrical, Instrumentation, ECE, EEE, VLSI, or related fields.
• Fresh graduates from the class of 2024 or 2025 only.
• Not currently enrolled in any M-Tech programs or postgraduate diplomas.
• Must not be employed in any full-time positions (limited internship experience is acceptable).
• Basic familiarity with CMOS layout techniques, design rules, and second-order layout effects.
• Proficient in MS Office Suite (Excel, Word, PowerPoint).
• Open to learning new tools, flows, and methodologies.
• Strong analytical thinking, effective communication skills, and ability to work collaboratively in a team environment.

Education Requirements

B.E./B.Tech in a relevant engineering field such as Electronics, Electrical, Instrumentation, ECE, EEE, VLSI, or a related discipline is required.