Analog Design Staff Engineer - SERDES Timing Analysis

Role Summary

The Analog Design Staff Engineer position involves leading SERDES timing analysis and characterizing high-speed designs within advanced process technologies. This role requires a proactive approach to enhance methodologies and ensure timely project delivery while collaborating with cross-functional teams.

Experience Level

This position requires candidates to have a strong foundation in analog and mixed-signal integrated circuit design, with 3 to 8 years of relevant industry experience.

Responsibilities

• Characterize timing, analyze results, and generate timing models for SERDES IP.
• Develop and align timing methodologies to enhance deliverable quality.
• Conduct design reviews and provide actionable insights based on timing assessments.
• Present technical findings to stakeholders and advocate for quality improvements.
• Provide leadership to the team, fostering a collaborative work culture.

Requirements

• Educational background in Electronics or Electrical Engineering (B.Tech/M.Tech).
• Strong theoretical and practical skills in transistor-level design and CMOS fundamentals.
• Experience with timing analysis tools and methodologies.
• Proficiency in scripting languages (TCL, Perl, C, Python, MATLAB).
• Effective communication and documentation skills are essential.

Education Requirements

B.Tech or M.Tech in Electronics, Electrical Engineering, or a related field is required.