The Analog Design Staff Engineer position focuses on the design and development of Multi-Gbps NRZ & PAM4 SERDES IP. This role is integral to the advancement of high-speed analog integrated circuits within a dynamic team that leverages advanced technologies to create innovative solutions.
The ideal candidate should possess a Ph.D. or M.Sc. with a minimum of 3 years, or a B.Sc. with over 5 years, of practical analog IC design experience, with a degree in Electrical Engineering or related fields. The candidate must have strong transistor-level circuit design skills, familiarity with SERDES sub-circuits, and experience with EDA tools for schematic entry and verification. Knowledge in Verilog-A and experience with scripting languages are desirable.
This position is geared towards candidates at a Mid-Career level, emphasizing the ability to lead projects and mentor junior engineers.
Required educational background includes a Ph.D. or M.Sc. in Electrical Engineering or Computer Engineering complemented by relevant practical experience in analog IC design.