VLSI Design Verification Manager - Slingshot ASIC Team

Job Title

VLSI Design Verification Manager - Slingshot ASIC Team

Role Summary

Lead verification for HPE Slingshot networking ASICs used in NIC and switch products. Manage a team of ~8–15 verification engineers to ensure verification methodology, execution quality, and sign‑off readiness for block, subsystem, and full‑chip scopes.

Base salary range in the U.S.: USD 135,000 - 310,500 (location- and experience-dependent). HPE is an equal opportunity employer.

Experience Level

Senior-level — manager role with responsibility for a verification team; typically requires 10+ years of VLSI design verification experience.

Responsibilities

Primary duties include setting verification strategy, driving execution, and developing people.

• Define, own, and evolve verification methodology and standards across block, subsystem, and full‑chip scopes.
• Lead verification planning, testbench and environment development, coverage closure, and sign‑off reviews.
• Ensure robust SystemVerilog/UVM environments with stimulus, scoreboards, checkers, assertions, and functional coverage.
• Drive regression health, failure triage, root‑cause isolation, and resolution of design issues with logic design and architecture teams.
• Manage regression execution, schedules, deliverables, and staffing to meet program milestones and quality goals.
• Recruit, mentor, set performance expectations, and support career growth for engineers across experience levels.
• Identify and implement process improvements, reuse, automation, and efficiency gains in verification workflows.
• Communicate verification status, risks, and readiness to management and cross‑functional partners.

Requirements

Must-have technical skills and leadership experience; preferred items listed separately.

• Strong hands‑on experience with SystemVerilog and UVM verification methodologies.
• Proven technical leadership in design verification (DV technical lead, block/project verification owner).
• Experience with verification planning, coverage‑driven verification, regression management, and sign‑off readiness.
• Proficiency with commercial EDA simulation tools and large‑scale regression workflows.
• Strong analytical, problem‑solving, written, and verbal communication skills; ability to work effectively in multi‑site, cross‑functional teams.
• Experience mentoring and developing engineers and managing verification teams.

Nice-to-have:

• Direct experience with Synopsys VCS large‑scale regression execution, triage workflows, and performance/throughput optimization.
• Familiarity with GitHub Enterprise Cloud workflows and AI-assisted tools for verification.
• Domain knowledge of high‑performance networking, Ethernet, SERDES, PCIe, or HPC/AI systems.
• Experience improving verification efficiency through automation, reuse, or methodology refinement.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.

About the Company

Company: Hewlett Packard Enterprise

Headquarters: Spring, TX, United States

Global enterprise technology company delivering hybrid cloud, edge-to-cloud platforms, servers, storage, networking, and IT services to help organizations build, run, and secure applications and infrastructure at scale.