UVM SystemVerilog Verification Engineer

Job Title

UVM SystemVerilog Verification Engineer

Role Summary

Responsible for developing and executing UVM-based verification plans and test strategies to validate the functionality, performance, and reliability of AirSpan's ASIC and FPGA designs for 4G/5G networking products.

Work closely with RTL design, firmware and system teams to debug issues, verify compliance with specifications, and maintain verification artifacts and reports.

Experience Level

Level: Senior. The role requires substantial experience — the posting specifies 10 years of experience in UVM-based verification of FPGA systems.

Responsibilities

Primary responsibilities include planning and executing verification activities and reporting results.

• Develop and implement UVM-based verification plans and test strategies for FPGA designs.
• Create testbenches, test cases, and automation frameworks in SystemVerilog.
• Perform functional, system-level, and regression testing for digital hardware components.
• Run simulations, analyze test results, and debug failures to identify root causes.
• Collaborate with design and development teams to resolve defects and iterate on fixes.
• Document test procedures, produce test reports, and track defects.
• Optimize verification processes, tools, and automation to improve efficiency and coverage.
• Ensure compliance with industry standards and customer requirements for 4G/5G products.

Requirements

Must-have technical skills and experience are listed first; preferred skills follow.

• Must-have: ~10 years of hands-on experience in UVM-based verification of FPGA systems.
• Must-have: Strong SystemVerilog and Universal Verification Methodology (UVM) expertise.
• Must-have: Proficiency in scripting for automation (Python or Perl).
• Must-have: Experience with simulation tools such as ModelSim or QuestaSim.
• Must-have: Experience with C/C++ and implementing bit-accurate models; DSP debugging experience.
• Must-have: Familiarity with debugging tools, coverage metrics, and formal verification techniques.
• Must-have: Knowledge of O-RAN architecture and 4G/5G protocols relevant to the product domain.
• Must-have: Strong problem-solving skills and ability to work in cross-functional teams.
• Nice-to-have: Verification experience with communication protocols and hardware description languages (VHDL/Verilog).
• Nice-to-have: Experience with hardware/software co-verification and FPGA development; prior design experience is a plus.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field (as stated in the posting).

About the Company

Company: AirSpan Networks

Headquarters: Boca Raton, Florida, United States

AirSpan Networks is a global provider of 4G and 5G network solutions, offering small cells, radios, baseband units and software for operators, enterprises and industrial applications to deliver efficient, cost‑effective connectivity.