Staff DFT Product Engineer — MBIST/DFT

Job Title

Staff DFT Product Engineer — MBIST/DFT

Role Summary

Lead development, validation, and customer adoption of Synopsys memory Built-In Self-Test (MBIST) and Design-for-Test (DFT) solutions. Work within the Product Engineering Team to define BIST architectures, prototype DFT methodologies, validate tool features, and support silicon bring-up and customer integrations.

Engage with cross-functional teams and customers to drive technical readiness, deliver training and support, and influence product direction for AI-enabled DFT capabilities.

Experience Level

Senior — typically a senior/staff engineer role. See Education Requirements for explicit years-of-experience guidance.

Responsibilities

Deliver technical leadership across MBIST and DFT product engineering, customer engagements, and validation activities.

• Define and implement MBIST architectures, memory grouping, pattern generation, and diagnostics for silicon bring-up.
• Lead validation and prototyping of next-generation DFT methodologies and test suites.
• Collaborate with feature development teams to specify and verify tool capabilities, including AI-enabled features.
• Drive early-adopter customer engagements: methodology alignment, flow reviews, and technical readiness.
• Provide technical support, training, and account-level assistance to ensure successful integrations and customer satisfaction.
• Analyze silicon failures and debug memory-related test issues; propose fixes and workarounds.
• Assess customer flows, gather requirements, and recommend tailored DFT/MBIST solutions.
• Contribute to competitive benchmarking and product evaluations to win new accounts.

Requirements

Core technical skills and proven delivery of MBIST/DFT solutions. Items labeled as "Nice-to-have" are desirable but not mandatory.

Must-have:

• Hands-on experience with RTL design, DFT insertion, ATPG, and end-to-end MBIST solution development.
• Deep knowledge of memory architectures, fault models, MBIST algorithms, and repair strategies (hard/soft, eFuse flows).
• Demonstrated track record delivering Memory BIST solutions for large, complex SoCs with heterogeneous IP integration.
• Experience debugging silicon bring-up issues and analyzing diagnostics for memory tests.
• Familiarity with industry test and debug standards: IEEE 1149.1 (JTAG), IEEE 1500, IEEE 1687 (IJTAG).
• Strong communication skills and experience working directly with customers and cross-functional teams.

Nice-to-have:

• Experience with automotive-grade MBIST designs and in-system test (IST) environments.
• Exposure to AI-enabled DFT methodologies or tool feature development.

Education Requirements

Bachelor's degree plus 7+ years of relevant industry experience, or a Master’s degree plus 5+ years, in Electrical Engineering, Computer Engineering, or a closely related discipline. (No certifications specified.)

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.