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SoC Subsystem Architect - AI Platform Development

Intel Corporation
May 22, 2026
Full-time
Remote friendly (Bengaluru, Karnataka, India)
Worldwide
RTL Design Jobs, Level - Senior

Job Title

SoC Subsystem Architect - AI Platform Development

Role Summary

Design and deliver complex SoC IP micro-architecture and RTL implementations for AI SoC products, working across architecture, verification, and physical teams. The role focuses on achieving performance, power, and timing targets for CPU and subsystem IP within a larger SoC.

Experience Level

Senior β€” requires significant experience; posting specifies 10+ years of relevant RTL/ASIC/SoC design and implementation experience.

Responsibilities

Work at the IP and subsystem level to define, implement, verify, and bring up RTL for SoC components, and support physical implementation and silicon validation.

  • Evaluate architectural trade-offs considering features, performance, power, and system limits.
  • Define and document micro-architecture for complex SoC IP blocks.
  • Implement RTL in Verilog/SystemVerilog, integrate at top level, and deliver synthesis- and timing-clean designs.
  • Collaborate with verification teams to achieve comprehensive coverage and robust validation.
  • Develop and maintain timing constraints; support synthesis, timing closure, and formal equivalence checks with physical design teams.
  • Drive silicon bring-up and post-silicon validation, including debug and performance analysis.
  • Mentor junior engineers and contribute to design methodology and quality improvements.

Requirements

Key technical and practical requirements. Must-haves are listed first; preferred items follow.

  • Must-have: 10+ years of RTL design and implementation experience for ASIC/SoC development.
  • Must-have: Strong Verilog/SystemVerilog RTL development and top-level integration experience.
  • Must-have: Experience with SoC system integration and multicore CPU subsystem design.
  • Must-have: Proven ability to solve timing closure, clock-domain crossing, and power-optimization challenges.
  • Must-have: Experience supporting synthesis, timing constraints, and physical design handoff.
  • Nice-to-have: Familiarity with HDL simulators (VCS, Questa, IES), lint tools (Spyglass), and FPGA prototyping tools (Xilinx Vivado, Quartus).
  • Nice-to-have: Proficiency in scripting (Python, TCL) for flow automation and design optimization.
  • Nice-to-have: Experience with high-speed and low-power design techniques and standard bus protocols (AXI, AHB).
  • Soft skills: Strong communication, collaboration, and leadership abilities; ability to work in a dynamic environment.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science; equivalent practical industry experience is acceptable.


About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

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Date Posted: 2026-05-22