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Senior Principal Physical Design Engineer

NXP Semiconductors
June 09, 2026
Full-time
On-site
Leuven, BE
Physical Design Jobs, Level - Senior

Job Title

Senior Principal Physical Design Engineer

Role Summary

Lead advanced physical implementation for complex SoCs and IP blocks, delivering performance, power, and area targets from RTL to GDSII. Work closely with architecture, design, and verification teams and drive improvements to methodologies and tool flows.

Experience Level

Senior β€” typically requires 15+ years of ASIC physical design experience and leadership on tape-outs at advanced process nodes.

Responsibilities

Accountable for the physical design flow, technical leadership, and mentoring.

  • Lead RTL-to-GDSII physical implementation: floorplanning, power planning, placement and routing, clock tree synthesis, and sign-off.
  • Perform static timing analysis, critical-path analysis, and timing closure activities.
  • Execute and verify design rule checks (DRC), layout-versus-schematic (LVS), and formal verification steps.
  • Develop and optimize physical-design methodologies, flows, and automation scripts to improve turnaround and quality.
  • Implement and validate low-power techniques such as clock gating, power gating, and multi-voltage design.
  • Collaborate with architects, RTL designers, and verification teams to resolve implementation issues.
  • Evaluate and integrate new EDA tools and sign-off flows to enhance capabilities.
  • Mentor and provide technical guidance to junior and mid-level engineers; produce design documentation and reports.

Requirements

Core technical skills and demonstrated leadership required. Education is listed separately below.

  • 15+ years of ASIC physical design experience with a strong record of successful tape-outs on advanced process nodes.
  • Deep expertise with industry EDA physical-design and sign-off tools (examples include Innovus/Tempus, Fusion Compiler/PrimeTime, RedHawk/PathFinder).
  • Proficiency in scripting for automation (Tcl, Perl, Python).
  • Strong understanding of static timing analysis concepts, constraints, and closure methodologies.
  • Hands-on experience applying low-power design techniques and methodologies.
  • Solid knowledge of semiconductor process technology and DFM principles.
  • Proven ability to lead technical initiatives, mentor engineers, and work effectively in cross-functional teams.
  • Excellent problem-solving, analytical, and communication skills.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a related field.


About the Company

Company: NXP Semiconductors

Headquarters: Nijmegen, Netherlands

NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.

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Date Posted: 2026-06-09