Senior FPGA Engineer

Job Title

Senior FPGA Engineer

Role Summary

The Senior FPGA Engineer will design and implement FPGA and ASIC components and prototypes to support MITRE's Electronic Systems Development R&D projects. The role focuses on rapid prototyping of embedded sensor, communication, and navigation systems on reconfigurable SoC and SDR platforms and works within cross-disciplinary teams supporting government research objectives.

Work includes hardware/software co-design, RTL development, and system-level integration for low-SWaP and high-throughput applications.

Experience Level

Senior. Basic qualifications reference typical combinations: ~5 years related experience with a Bachelor’s, ~3 years with a Master’s, or PhD with relevant experience; equivalent combinations of education and experience are accepted.

Responsibilities

Primary duties include rapid prototyping, RTL and system development, and cross-team collaboration:

• Design, implement, and synthesize FPGA/ASIC RTL (VHDL, Verilog/SystemVerilog) and integrate with embedded software.
• Develop proof-of-concept prototype systems on embedded platforms (SoC, RFSoC, SDR) and optimize for SWaP-C and throughput.
• Integrate third-party IP, perform simulation, verification, and testing, and support timing closure.
• Implement algorithms in hardware and software and support system architecture and deployment.
• Document designs, run tests, and maintain version control and build procedures.
• Collaborate with multidisciplinary teams and provide technical leadership on FPGA design and verification.

Requirements

Must-have technical skills and conditions:

• Strong programming and RTL experience with VHDL, Verilog/SystemVerilog and experience with RTL synthesis and simulation tools.
• Experience implementing complex embedded systems and integrating IP into custom designs.
• Familiarity with design verification, test, and deployment best practices.
• Excellent oral and written communication skills.
• U.S. citizenship and ability to obtain and maintain a DoD Secret clearance.
• On-site presence required: minimum 4 days per week at the Bedford, MA office.

Nice-to-have:

• Experience with AMD Xilinx MPSoC/RFSoC/Versal or Intel Agilex SoC and exposure to EDA ASIC tools (synthesis, timing closure, place & route).
• Understanding of processor interfaces (memory-mapped peripherals, interrupts), scripting/build tools (Tcl, Python, CMake), and MATLAB.
• Experience with verification methodologies (UVM/OVM) and hardware emulation platforms (Cadence Palladium, Siemens Veloce).
• Exposure to foundry processes, microelectronic circuits, and advanced process nodes.

Education Requirements

The posting references a Bachelor’s degree (typically with ~5 years related experience), a Master’s degree (~3 years related experience), or a PhD with relevant experience. Preferred fields include Electrical Engineering, Computer Engineering, or similar technical disciplines. The employer accepts equivalent combinations of education and work experience.

About the Company

Company: MITRE

Headquarters: Bedford, Massachusetts, United States

MITRE is a not-for-profit organization dedicated to solving national challenges in defense, cybersecurity, healthcare, aviation, and more. By partnering with the government, MITRE operates R&D centers that develop innovative solutions for public interest. Known for its culture of innovation, it offers exceptional employee benefits, professional growth opportunities, and diversity initiatives to ensure a fulfilling workplace for its staff.