Synopsys logo

Senior Director, Digital Design

Synopsys
May 22, 2026
Full-time
On-site
Sunnyvale, California, United States
$229,000 - $343,000 USD yearly
RTL Design Jobs, Level - Senior

Job Title

Senior Director, Digital Design

Role Summary

Lead digital design for high-speed die-to-die interconnect ICs within the Silicon Engineering organization. Manage RTL, synthesis, timing closure, DFT, verification, and pre-silicon validation to deliver multi-GHz interconnect IP for AI systems.

Provide technical leadership across teams (analog, physical implementation, system architecture) to meet latency, frequency, and power targets.

Experience Level

Senior β€” 15+ years of digital design experience with multiple high-speed ASIC tapeouts and at least 5 years in technical leadership.

Responsibilities

Drive technical execution, quality, and delivery for digital interconnect IP.

  • Lead RTL architecture, microarchitecture reviews, and implementation through physical design handoff.
  • Direct RTL development, logic synthesis, timing closure, and clock domain crossing verification for multi-GHz datapaths.
  • Oversee DFT implementation including scan insertion, ATPG, MBIST, and boundary scan.
  • Define and manage verification strategy, UVM testbench architecture, assertion-based verification, and coverage closure.
  • Guide pre-silicon validation using emulation for link training and error recovery testing.
  • Conduct technical reviews of RTL quality, synthesis QoR, and verification plans; identify root causes of timing violations.

Requirements

Core technical skills and proven leadership required.

  • 15+ years digital ASIC design experience with multiple high-speed tapeouts; 5+ years in technical leadership.
  • Expertise in SystemVerilog RTL design: complex FSMs, pipelined datapaths, and clock domain crossing.
  • Demonstrated logic synthesis and timing closure experience on multi-GHz designs.
  • Proven background in high-speed digital design for SerDes, PHY, or die-to-die interconnect.
  • Comprehensive DFT experience: scan design, ATPG, MBIST, and boundary scan.
  • Strong digital verification skills including UVM, assertions, and formal verification.
  • Experience with emulation and pre-silicon validation platforms.

Nice-to-have: Experience optimizing latency/throughput/power tradeoffs for AI systems and mentoring engineers on metastability handling and low-latency techniques.

Education Requirements

Not specified.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

Synopsys logo

Date Posted: 2026-05-14