Senior DFT Engineer - LPU

Job Title

Senior DFT Engineer - LPU

Role Summary

Senior DFT Engineer responsible for design-for-test (DFT) implementation and post-silicon test bring-up for high-performance ASICs in the LPU team. Work spans scan/MBIST/JTAG structures, ATPG and MBIST pattern generation, DFT timing constraints, and collaboration with physical design, STA sign-off, and post-silicon teams.

Contribute to CAD methodology improvements, including AI-driven DFT optimizations, to increase test coverage and reduce debug time.

Experience Level

Senior — requires experienced engineer. The posting specifies 5+ years of industry experience in DFT for high-performance ASICs.

Responsibilities

Key responsibilities include design, verification, and lab bring-up of DFT features for large SoC/ASIC designs.

• Define and implement SCAN, MBIST, and JTAG debug structures and advanced DFT schemes.
• Create and validate ATPG and MBIST test vectors; translate and optimize test patterns for silicon.
• Build DFT timing constraints and coordinate with Physical Design and STA sign-off to ensure timing closure in DFT mode.
• Support post-silicon bring-up: run and debug test patterns on ATE, diagnose silicon issues, and iterate solutions.
• Collaborate with CAD/methodology teams to introduce AI-driven and other efficiency improvements to DFT flows.

Requirements

Must-have technical skills and practical experience for immediate contribution.

• 5+ years of hands-on DFT experience on high-performance SoC/ASIC projects.
• Practical experience with SCAN/MBIST and test generation tools and processes for large designs.
• Domain expertise in ATPG, test pattern translation, yield learning, scan compression, MBIST, IEEE 1500, and LBIST.
• Familiarity with ATPG Streaming SCAN Network (SSN) implementation.
• Experience with UDFMs such as Cell Aware and Small Delay Defect methodologies.
• Proven track record in yield estimation and test optimization.
• Experience working with real silicon in the lab and debugging DFT test sequences on ATE.
• Solid understanding of RTL-to-GDS methodologies and formal equivalence checking.
• Strong scripting and coding skills (Tcl, Python).
• Good interpersonal and organizational skills; ability to work in cross-functional teams.

Education Requirements

Bachelor's or M.S. in Computer Engineering or Electrical Engineering, or equivalent practical experience.

About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.