Senior ASIC Floorplan Design Engineer
Design and optimize floorplans for high-performance SoCs and GPUs, collaborating with architects, physical design leads, and package teams. The role focuses on early chip development to influence area, interconnect, timing, and routing outcomes.
This position contributes to NVIDIA's hardware platform by improving area efficiency, timing closure, and physical implementation flow and tooling.
Senior β 12+ years of relevant experience.
Key responsibilities include early-stage floorplan development, cross-team reviews, and tooling to improve chip area and execution speed:
Must-have technical skills and experience.
Master's degree in Electrical Engineering, Computer Science, or Computer Engineering, or equivalent practical experience.
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
