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Senior Analog/Mixed-Signal IC Design Engineer - Acacia (Hybrid)

Cisco Systems
May 23, 2026
Full-time
Remote friendly (San Jose, California, United States)
Worldwide
$191,400 - $281,400 USD yearly
ASIC Design Jobs, Level - Senior

Job Title

Senior Analog/Mixed-Signal IC Design Engineer - Acacia (Hybrid)

Role Summary

Member of the Mixed-Signal IC design team developing high-speed analog and mixed-signal circuits for Acacia optical transceivers used in data center, metro, long-haul and ultra-long-haul networks. The role covers architecture, circuit design, layout, measurement and productization of ultra-deep-submicron CMOS ICs that integrate with digital/DSP, packaging and module subsystems.

This is a hybrid role that requires onsite presence three days per week at the San Jose, CA office.

Experience Level

Senior. Significant hands-on industry experience designing and delivering complex analog/mixed-signal ICs; see Education Requirements for the degree-plus-experience breakdown.

Responsibilities

Primary responsibilities include ownership of large analog/mixed-signal blocks through design and production.

  • Architect, design, simulate, layout, measure and productize high-speed CMOS analog/mixed-signal ICs.
  • Lead design efforts for large blocks on complex chips; drive schedules and deliverables.
  • Mentor and review work from other engineers; establish and enforce design methodology and best practices.
  • Collaborate with digital/DSP, package, system and module teams to meet signal and power integrity, timing and manufacturability targets.
  • Develop and validate high-speed AMS circuits (SERDES, data converters, PLLs, equalizers, drivers, regulators, etc.) and support bring-up and production test.

Requirements

Must-have skills and experience for immediate contribution.

  • Extensive hands-on experience designing, simulating and measuring high-speed analog/mixed-signal ICs in a production environment.
  • Experience across at least three areas such as high-speed serial links (serializers/deserializers), data converters, PLLs/clocking, voltage regulators, output drivers, opamps/programmable gain amplifiers, equalization, or clock transmission/propagation.
  • Proven track record of leading a large analog block on a complex SoC or transceiver ASIC.
  • Strong RF/high-frequency layout skills, custom transistor layout, and floorplanning (power/ground and analog/digital separation).
  • Practical laboratory measurement experience for high-speed analog circuits, including ESD-aware test practices.
  • Ability to collaborate across disciplines (digital/DSP, packaging, hardware) and drive designs from concept to production.

Preferred / Nice-to-have:

  • Experience with electrical transceiver applications (backplane, cable communications) and passive high-frequency components (inductors, transformers, transmission lines).
  • Experience with FinFET technology and design-for-manufacturability.
  • Familiarity with Cadence Virtuoso, Spectre/APS/SpectreX, Matlab, EMX and mixed-signal AMS simulation flows.

Education Requirements

Degree-plus-experience options in electrical or related engineering fields: BSEE with 12+ years of relevant experience, MS with 8+ years, or PhD with 5+ years, or equivalent practical experience.


About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

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Date Posted: 2026-05-24