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Physical Design Engineer

Intel Corporation
May 22, 2026
Full-time
Remote friendly (Penang, MY)
Worldwide
Physical Design Jobs, Level - Mid-Career

Job Title

Physical Design Engineer

Role Summary

Design and implement physical layout for custom IP and SoC components, transforming RTL into manufacturing-ready databases using industry EDA tools and methodologies. Work within a cross-functional engineering team to meet power, performance, and area (PPA) targets at advanced process nodes.

Experience Level

Mid-level. Typical experience expectations per the posting: Bachelor's +2 years, Master's +1 year, or PhD with no additional experience required.

Responsibilities

Execute physical design flow and collaborate with architecture and design teams to achieve signoff-quality deliverables.

  • Perform RTL-to-GDS physical design stages: synthesis, floorplanning, placement, routing, CTS, and STA.
  • Conduct verification and signoff work: formal equivalence, layout verification, reliability, and power/noise analysis.
  • Lead timing closure using tools such as PrimeTime; analyze timing reports and implement ECOs.
  • Develop power and clock distribution strategies and implement low-power techniques.
  • Collaborate with architects and designers to define constraints, clocking, I/O budgets, and achieve IP budget convergence.
  • Improve design flows and automation to support new technologies and architectures.
  • Mentor junior engineers and contribute to team skill development.

Requirements

Must-have technical skills and experience. Preferred items are listed after must-haves.

  • Must-have: Hands-on experience with full RTL-to-GDS flow, physical design methodologies, STA, and timing signoff.
  • Must-have: Proven use of EDA tools for physical design and verification (examples: PrimeTime, ICC, Innovus).
  • Must-have: Proficiency in scripting and automation (Perl, TCL or similar) to streamline design flows.
  • Must-have: Understanding of low-power and advanced design techniques for deep sub-micron process nodes.
  • Preferred: Multiple tape-outs on advanced nodes; experience developing SDC constraints, timing budgeting, and ECO implementation.
  • Preferred: Familiarity with hardware description languages (Verilog or VHDL) and strong cross-team collaboration and problem-solving skills.

Education Requirements

Bachelor's degree in Electrical or Computer Engineering or related field (with 2+ years' experience), or Master's degree (with 1+ years' experience), or PhD in a relevant technical field (experience may be 0 years). Fields referenced: Electrical Engineering, Computer Engineering, or related technical disciplines.


About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

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Date Posted: 2026-05-22