PCIe Lead Engineer – Linux Enablement & AVV (Pre/Post-Silicon) – RISC-V MPU Platform

Job Title

PCIe Lead Engineer – Linux Enablement & AVV (Pre/Post-Silicon) – RISC-V MPU Platform

Role Summary

Technical owner for PCIe enablement across the stack on a 64-bit RISC-V MPU Linux platform. Responsible for boot-to-user-space bring-up, Linux kernel/driver integration, automated validation (AVV) on virtual platforms/FPGA and first silicon, and delivering production-quality SDK releases.

Work closely with architects, RTL/SerDes/PHY, board, and platform teams to de-risk the PCIe subsystem, drive bring-up readiness, and support customer interoperability and upstream fixes.

Experience Level

Senior — the role expects an experienced engineer; the posting indicates strong experience in the 8–12 year range in Embedded Linux platform/BSP and device-driver development.

Responsibilities

Primary responsibilities for PCIe bring-up, validation, and cross-functional delivery:

• Enable and maintain PCIe Root Complex and/or Endpoint functionality on Linux (enumeration, config space, BARs, DMA, interrupts).
• Bring up PCIe controller, PHY/SerDes, clocks/resets, link training (LTSSM), and interrupt routing.
• Drive kernel/BSP enablement: Device Tree bindings, address translation/windows, IOMMU interactions, and power management (ASPM, suspend/resume).
• Create AVV test plans and automation for FPGA/emulation and first-silicon validation (link bring-up, enumeration, throughput, error injection).
• Debug HW/FW/kernel interactions using logs, traces and lab equipment; triage issues and drive fixes to closure.
• Define PCIe feature targets (lane/width/speed, RC/EP modes) and own bring-up milestones and release readiness.
• Collaborate with OEMs/Tier-1s and platform teams on interoperability and compliance testing; contribute upstream patches when appropriate.
• Deliver PCIe-ready SDK releases, regression validation and developer documentation/debug guides.

Requirements

Must-have technical skills and experience required to perform the role:

• Expert-level C programming and experience reading/modifying kernel, driver, and low-level firmware code.
• Strong Linux internals knowledge: boot flow, memory and interrupt subsystems, concurrency, and performance debugging.
• Hands-on SoC/platform bring-up experience with high-speed I/O ownership for subsystem quality.
• Practical experience with U-Boot, Linux kernel, Device Tree, and Yocto/OpenEmbedded; integration and validation in BSP/SDK releases.
• Strong debugging skills with GDB and one or more hardware debug tools (OpenOCD/JTAG, Lauterbach, etc.).
• Experience working with FPGA, emulation, or early-silicon platforms for bring-up and validation.

Nice-to-have:

• Deep PCIe expertise (RC/EP concepts, AER, LTSSM, equalization, throughput tuning).
• Experience with PCIe compliance/interoperability testing, SR-IOV, ATS/PRI, hot-plug/hot reset, or PCIe switches.
• Familiarity with platform security concerns related to PCIe (IOMMU/SMMU, DMA attack surface, secure boot).
• Experience with QEMU/virtual platforms, CI/CD for automated validation, and Python/shell test frameworks.

Education Requirements

B.E./B.Tech or M.E./M.Tech in Computer Engineering, Electrical Engineering, or a related field.

About the Company

Company: GlobalFoundries

Headquarters: Saratoga Springs, New York, USA

GlobalFoundries is a leading contract manufacturer for the global semiconductor industry, with facilities in multiple countries, including the USA. The company develops a broad portfolio of semiconductor technologies and employs around 13,000 people worldwide. GlobalFoundries focuses on enhancing competitiveness in specialized application solutions and fostering innovation in mobile communications, consumer electronics, and automotive applications.