Packaging Engineer, Senior

Job Title

Packaging Engineer, Senior

Role Summary

The Packaging Engineer, Senior will develop advanced semiconductor package technologies and package-to-system solutions. The role focuses on package architecture selection, multi-physics simulation and lab validation, manufacturing qualification for new product introductions, and cross-functional collaboration to meet performance, reliability, and cost targets.

Experience Level

Senior-level. The role expects experienced engineers with several years in system/package design and technology; preferred candidates have 3+ years of relevant packaging or system design experience (see Education Requirements for degree-linked minimums).

Responsibilities

Key responsibilities include technical ownership of package design and qualification across thermal, electrical and mechanical domains.

• Drive package product design layout and multi-physics optimization for discrete packages and Module/SiP (single- or multi-die).
• Perform thermal simulations and contribute to cooling architecture to meet thermal performance targets.
• Perform electrical analysis and simulations across SoC, substrate, interposer, components and PDN; support tapeout preparation for electrical goals.
• Simulate mechanical interactions to optimize materials, structure, and reliability.
• Plan and execute empirical testing, characterize mechanical/electrical performance, and analyze board/system interactions.
• Develop and qualify packaging technology (substrate, interposer, heterogeneous integration) and drive manufacturing NPI activities.
• Collaborate with cross-functional teams, vendors, and IP groups to define package-to-system specifications and ensure design for manufacturability and yield.

Requirements

Must-have technical skills and experience for day-one contribution; preferred items listed separately.

• Experience in system/package design and packaging technology development (design, simulation, verification, or qualification).
• Practical skills with multi-physics simulation tools for thermal, electrical and mechanical analysis and design optimization.
• Lab validation and correlation experience for package-to-system models and design verification.
• Knowledge of substrate, interposer, and SiP architectures and fabrication/qualification processes.
• Experience with tapeout flows and design tool development for package/Module/SiP products.
• Hands-on empirical testing, materials characterization, and failure analysis skills.
• Strong written and verbal communication and ability to work across multidisciplinary teams and with external vendors/standards bodies.
• Nice to have: experience with 2.5D/3D integration (chiplet architectures, die stacking), DRM/process/material development, and high-density interconnect design rules.

Education Requirements

Minimums in the original posting: Bachelor's degree in Chemical, Electrical, Mechanical Engineering or related field with 2+ years of system/package design/technology experience; OR Master's in those fields with 1+ year of relevant experience; OR PhD in a related field. Preferred: Master's degree and ~3+ years of system/package design or related experience.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.