Lead DSP Engineer

Job Title

Lead DSP Engineer

Role Summary

Lead DSP Engineer on the Automotive Ethernet PHY development team responsible for implementing and optimizing DSP algorithms and RTL for automotive-grade Ethernet PHY products. The role works closely with DSP Architecture, System Architecture, DFT, Verification, Validation, IC Integration, and Backend teams to deliver production-ready silicon.

Experience Level

Senior — requires 7+ years of experience in DSP design for communication systems.

Responsibilities

Implement, integrate, and validate DSP algorithms and RTL to meet system specifications and production requirements.

• Implement DSP architecture and algorithms for Automotive Ethernet PHYs (e.g., 100/1000BASE-T1, multi-gig).
• Translate system-level specifications into optimized, synthesizable RTL and micro-architectural documentation.
• Design and optimize datapaths: filters, equalizers, echo cancellation, FFE/DFE, AGC, timing recovery, PLLs.
• Collaborate on algorithm-to-architecture mapping, fixed-point modeling, and model-to-RTL correlation (MATLAB/C-model ↔ RTL).
• Support Verification and Validation: test plan development, debug, coverage closure, and post-silicon bring-up.
• Work with DFT, IC integration, and Backend teams to ensure testability, timing closure, and seamless SoC integration.
• Develop and maintain MATLAB/Python models, run simulations, analyze performance metrics, and improve tool flows.

Requirements

Must-have technical skills and experience required to perform the role.

Must-have:

• 7+ years of hands-on experience in DSP design for communication systems.
• Strong fundamentals in digital signal processing, communication theory, and PHY-layer technologies.
• Hands-on experience with PHY subsystems: filtering, equalization, echo cancellation, timing recovery, PLLs, and noise mitigation.
• Proficiency in MATLAB, Simulink, Python, or C/C++ for algorithm modeling and validation.
• Strong RTL design skills in Verilog/SystemVerilog and experience with synthesis, linting, CDC, and STA flows.
• Experience supporting verification activities and post-silicon debug.

Nice-to-have:

• Experience with Automotive Ethernet PHYs (100BASE-T1, 1000BASE-T1, multi-gig).
• Knowledge of EMC/EMI automotive requirements and DFT/ATPG/scan architectures.
• Exposure to backend flows, timing constraints, timing closure methodologies, formal verification, and UVM-based environments.

Soft skills: strong analytical problem-solving, clear communication and documentation, and ability to work across global teams.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Electronics, Communication Engineering, or a related technical field.

About the Company

Company: NXP Semiconductors

Headquarters: Nijmegen, Netherlands

NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.