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FPGA / VLSI Engineer

PDDN
May 22, 2026
Full-time
On-site
Saratoga, California, United States
$120,000 - $220,000 USD yearly
RTL Design Jobs, Level - Mid-Career

Job Title

FPGA / VLSI Engineer

Role Summary

Design and validate digital hardware for ASIC/SoC platforms used in advanced communication systems, with emphasis on RTL design, FPGA prototyping, and system integration for LEO satellite communications. Work within a cross-functional engineering team to deliver timing- and area-aware implementations and to integrate with verification, ASIC, and software teams.

Experience Level

Mid-level (typical experience range: 3–7 years).

Responsibilities

Accountable for RTL development through FPGA validation and for contributing to SoC-level integration and debugging.

  • Design and implement synthesizable RTL using SystemVerilog with attention to timing, power, and area.
  • Perform FPGA prototyping, implementation, validation, and hardware bring-up.
  • Develop and execute simulation and debugging strategies at block and subsystem levels.
  • Integrate designs at SoC level, interfacing with processors, memory, and peripherals.
  • Analyze and resolve timing issues, including setup/hold violations and basic clock domain crossing concerns.
  • Collaborate with verification, ASIC, and software teams to ensure functional correctness and performance.
  • Participate in design reviews and contribute to design-quality improvements and best practices.

Requirements

Required technical skills and relevant experience. Preferred skills are listed separately.

  • Must-have: Strong experience writing synthesizable SystemVerilog/Verilog.
  • Must-have: Proven experience with FPGA development flows (synthesis, implementation, validation) and hardware bring-up.
  • Must-have: Solid understanding of digital design fundamentals and timing analysis.
  • Experience developing and executing simulation and debugging strategies for block and subsystem verification.
  • Experience with SoC-level integration and interfacing to processors, memory, and peripherals.
  • Nice-to-have: Experience with SoC FPGA platforms (Xilinx Zynq, Intel SoC FPGA), AXI/AHB or similar bus protocols, ASIC design flow (synthesis and STA), high-speed interfaces (PCIe, Ethernet), or communication systems (5G PHY/MAC concepts).

Education Requirements

Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field (as stated in the posting).


About the Company

Company: PDDN

PDDN is an engineering services firm specializing in ASIC and SoC verification, with expertise in ARM IPs (e.g., Cortex-A, Mali), UVM/SystemVerilog-based verification, formal methods, coverage analysis, and CI/CD-enabled hardware verification workflows.

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Date Posted: 2026-05-22