ASIC Verification Engineer

Job Title

ASIC Verification Engineer

Role Summary

We are seeking an ASIC Verification Engineer to develop and own verification for ARM-related IP blocks (Cortex‑A v9, Mali GPU, CSS600/CoreSight). The role focuses on verification strategy, test development, coverage analysis, and cross-team debugging within a global verification organization.

This is a 100% remote individual-contributor role responsible for block- and subsystem-level verification through the full project lifecycle.

Experience Level

Mid-level — typically 5+ years of relevant ASIC verification experience.

Responsibilities

Primary responsibilities include planning, implementing, and executing verification for core IP blocks and supporting the full project lifecycle.

• Develop verification plans, test cases, and UVM environments for block-level verification.
• Perform functional coverage analysis, assertions, and constraint-random stimulus generation.
• Debug RTL failures, perform root-cause analysis, and support gate-level simulation.
• Design and implement C-based tests to configure and validate ARM IPs; reuse vendor-provided test benches where applicable.
• Participate in specification and architectural reviews to improve requirements and design quality.
• Collaborate with the global verification team to refine processes and verification methodologies.

Requirements

Must-have technical skills and experience below; nice-to-have items are listed separately.

• Proven hands-on verification experience (5+ years) with methodologies: UVM/SystemVerilog, formal verification, constraint-random verification, assertions, coverage metrics, and gate-level simulation.
• Strong knowledge of ARM-related IPs: CPU (Cortex‑A v9), GPU (Mali), Debug (CSS600, CoreSight).
• Experience creating C-based test cases for ARM IP configuration and testing; ability to reuse manufacturer-provided test benches.

Nice-to-have

• Experience building and reusing UVM-based environments from block to subsystem level.
• Ability to read and understand RTL (SystemVerilog, Verilog, VHDL).
• Familiarity with revision control systems and CI/CD workflows.
• Strong interpersonal, documentation, and communication skills.

Education Requirements

Not specified.

About the Company

Company: Capgemini

Headquarters: Paris, France

Global consulting, technology and engineering services firm offering digital and business transformation, cloud, AI, and engineering/R&D services across industries. Employs around 340,000 people in 50+ countries and provides end-to-end solutions from strategy and design to engineering.