ASIC Verification Engineer - Acacia

Job Title

ASIC Verification Engineer - Acacia

Role Summary

Senior verification engineer responsible for verifying complex DSP ASICs used in high-speed coherent optical communications products. The role is part of the Acacia team and focuses on developing and executing advanced verification strategies to ensure design quality for next-generation 100G–1.6T products.

Experience Level

Senior-level. Typical experience expectation is in the senior range; see Education Requirements for degree-equivalent experience guidance.

Responsibilities

Key responsibilities include planning and executing verification activities, providing technical leadership, and improving verification processes.

• Lead and develop detailed, comprehensive test plans for complex ASICs.
• Design and lead development of verification testbenches and environments.
• Apply advanced verification techniques and object-oriented verification methodologies.
• Supervise and coordinate execution of test plans across the team.
• Review verification code and coverage metrics; drive quality improvements.
• Provide technical leadership and mentoring to engineers on the team.
• Collaborate with cross-functional teams to incorporate new verification tools and processes.

Requirements

Must-have skills and experience to perform the role; preferred items are listed separately.

Must-have

• Proven experience with ASIC verification methodologies, tools, and workflows.
• Experience with SystemVerilog and UVM; familiarity with SystemC.
• Experience programming or scripting in C/C++ and other verification scripting languages.
• Strong knowledge of object-oriented verification methodologies and verification architecture.
• Experience creating and executing test plans, writing and validating testbenches, and analyzing coverage.
• Strong written and verbal communication skills and ability to work independently in a fast-paced environment.

Nice-to-have / Preferred

• Experience leading ASIC technical teams or projects.
• Experience with DSP algorithms and modulation techniques (e.g., QAM).
• Experience with in-house IP development and lab silicon validation.
• Familiarity with Formal Verification methodologies and tools (e.g., Jasper, VCFormal).
• Experience with advanced C++ features such as templates.
• Track record of process or tooling innovations that improved verification efficiency or coverage.

Education Requirements

Required: Bachelor's degree plus ~8 years related experience, Master's degree plus ~6 years related experience, PhD plus ~3 years related experience, or equivalent related work experience. The posting accepts equivalent practical experience; no specific field of study is mandated in the posting.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).