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ASIC Verification Engineer

Capgemini
May 23, 2026
Full-time
Remote
Worldwide
$76,200 - $187,740 USD yearly
Verification Jobs, Level - Mid-Career

Job Title

ASIC Verification Engineer

Role Summary

Remote ASIC Verification Engineer responsible for planning and executing verification for ARM-related IP blocks (CPU Cortex‑A v9, GPU Mali, Debug CSS600/CoreSight) as an individual contributor. You will own verification tasks across the project lifecycle, from spec review and test development to coverage analysis and gate‑level simulation.

Experience Level

Mid-level — typically requires 5+ years of hands‑on ASIC verification experience.

Responsibilities

Primary responsibilities include:

  • Develop and execute verification plans and test cases for core IP blocks (CPU, GPU, Debug).
  • Create and maintain UVM/SystemVerilog verification environments and C‑based tests to configure and validate ARM IPs.
  • Perform coverage analysis, assertions, constraint‑random verification, and gate‑level simulation.
  • Debug RTL and verification failures; perform GLS and KPI testing as required.
  • Participate in specification and architectural/design reviews to improve requirements and testability.
  • Collaborate with global verification teams to improve processes and verification methodologies.

Requirements

Must-have qualifications and skills:

  • 5+ years of hands‑on ASIC verification experience using modern methodologies.
  • Strong practical experience with UVM and SystemVerilog verification flows.
  • Experience with formal verification, constraint‑random verification, assertions, and coverage metrics/analysis.
  • Hands‑on experience with gate‑level simulation and key performance indicators testing.
  • Strong understanding and hands‑on experience with ARM‑related IPs: CPU (Cortex‑A v9), GPU (Mali), Debug (CSS600, CoreSight), or equivalent.
  • Ability to design and implement C‑based test cases and reuse vendor‑provided test benches.

Nice-to-have:

  • Experience building and reusing UVM test environments at block and subsystem level.
  • Ability to read and understand RTL (SystemVerilog, Verilog, VHDL).
  • Experience with revision control systems and CI/CD techniques for verification flows.
  • Strong documentation, communication, and cross‑team collaboration skills.

Education Requirements

Not specified.


About the Company

Company: Capgemini

Headquarters: Paris, France

Global consulting, technology and engineering services firm offering digital and business transformation, cloud, AI, and engineering/R&D services across industries. Employs around 340,000 people in 50+ countries and provides end-to-end solutions from strategy and design to engineering.

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Date Posted: 2026-05-24