ASIC Design Verification Technical Leader - Acacia

Job Title

ASIC Design Verification Technical Leader — Acacia

Role Summary

Senior verification lead responsible for planning and executing verification for next-generation coherent optical ASICs (100G–1.6T) within Cisco’s Acacia business. Works with cross-functional design, lab, and systems teams to ensure silicon quality, drive verification strategy, and mentor engineers.

Experience Level

Senior — typically 12+ years of ASIC design verification experience as indicated in the posting.

Responsibilities

Lead technical verification activities from planning through implementation and closure; provide technical leadership and process improvements.

• Develop and maintain detailed chip- and block-level verification plans.
• Design, develop, and maintain verification testbenches and VIP.
• Apply advanced verification methodologies and innovate verification approaches for complex designs.
• Supervise and coordinate execution of test plans across the team to meet schedule and quality targets.
• Drive chip-level tradeoffs and collaborate with design engineers to resolve issues.
• Review verification code, coverage metrics, and results; report verification status and gaps.
• Provide technical mentoring and guidance to engineers on verification techniques and tools.
• Introduce and integrate new test technologies and verification processes.

Requirements

Must-have technical skills and experience required for this role.

• 12+ years of hands-on ASIC verification experience using modern methodologies and tools.
• Proven experience with SystemVerilog and UVM.
• Experience developing and using Verification IP (VIP) and VIP strategies.
• Strong knowledge of object-oriented verification methodologies and verification best practices.
• Proficient in scripting/programming for verification environments.
• Excellent written and verbal communication; able to operate independently in a fast-paced environment.
• Demonstrated ability to lead technical projects and mentor engineers.

Nice-to-have / preferred:

• Experience with C++ hybrid testbenches.
• Lab silicon validation experience.
• Knowledge of DSP algorithms and modulation techniques (e.g., QAM).
• Familiarity with formal verification methodologies and tools (e.g., Jasper, VCFormal).
• Track record of innovation and measurable process or product improvements.

Education Requirements

Bachelor’s or Master’s degree in Computer Science, Computer Engineering, Electronic Engineering, or Electrical Engineering is specified as required; the posting pairs this with 12+ years of relevant ASIC verification experience. No mention of PhD, certifications, or explicit equivalent-experience language was provided.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).