Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)

Job Title

Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)

Role Summary

Join the Acacia mixed-signal IC design team to architect, design, layout, characterize, and productize high-speed CMOS analog/mixed-signal circuits for optical transceivers (100G–1.6T+). The role collaborates with digital/DSP, system, package, and module teams to meet signal and power integrity requirements.

This is a hybrid role requiring three days per week onsite in San Jose, CA.

Experience Level

Senior-level. The posting expects senior experience; see Education Requirements for degree-linked experience guidance. Candidates should have substantial hands-on AMS IC design experience and experience leading complex chip blocks and mentoring engineers.

Responsibilities

Design, verify and productize high-speed analog/mixed-signal blocks for optical transceivers and ensure integration into complex ASICs.

• Architect and implement high-speed AMS circuits (serdes, drivers, PLLs, opamps, PGAs, equalizers).
• Perform circuit simulation, layout review, and tapeout readiness; collaborate on floorplanning and power/ground partitioning.
• Lead a large block on complex chips, track deliverables, and mentor junior engineers.
• Participate in peer reviews and establish solid design methodologies from conception to production.
• Collaborate with packaging and hardware teams to meet signal and power integrity specifications.
• Develop laboratory validation plans, characterize silicon across PVT, and support manufacturing qualification.

Requirements

Key technical must-haves and preferred skills. Degree-specific experience requirements are listed under Education Requirements below.

• Must-have: Hands-on experience in design, simulation, and measurement of high-speed ICs in at least three of these areas: high-speed serial links (SERDES, ADC/DAC), system link modeling, high-performance output drivers, phase-locked loops, efficient clock distribution, opamps/programmable gain amplifiers, and equalization techniques.
• Must-have: Experience with analog/mixed-signal design flow: Cadence Virtuoso, Spectre/SpectreX, AMS simulations, layout validation (Calibre), and Matlab for analysis.
• Must-have: Proven ability to drive designs from concept through silicon validation and production readiness, including mentoring and cross-team collaboration.
• Preferred: Experience with electrical transceiver applications (backplane and cable), FinFET or GAA process technologies, and high-frequency layout (passives, transmission lines).
• Preferred: Design-for-manufacturability skills: characterization over PVT, electromigration, self-heating, IR drop analysis, and ESD practices.
• Preferred: Lab validation experience and building test setups for high-speed links.

Education Requirements

Minimum qualification: Bachelors + 8 years related experience, or Masters + 6 years related experience, or PhD + 3 years related experience. The posting ties experience expectations to degree level; no specific fields of study were specified beyond related experience.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).