Analog Mixed-Signal Design Engineer

Job Title

Analog Mixed-Signal Design Engineer

Role Summary

Join a small engineering team building next-generation ASICs for neural-assistive systems. This hands-on role owns modules from specification through transistor-level design, simulation, and verification, and participates in post-silicon bring-up and validation.

Work closely with layout, digital, and test engineers in an on-site Alameda, CA engineering environment focused on high-precision, low-noise, ultra-low-power analog and mixed-signal circuits.

Experience Level

Senior. The posting specifies MS + 8+ years or PhD + 5+ years in AMS IC design/verification; expects multiple successful tapeouts.

Responsibilities

Primary responsibilities include specification-driven design, verification, and documentation of analog/mixed-signal ASIC blocks.

• Own module/block lifecycle: architecture exploration, transistor-level design, and documentation.
• Perform pre- and post-layout simulation, Monte Carlo, SOA, reliability, and aging analysis.
• Design high-precision, low-noise, ultra-low-power circuits (e.g., bandgap, clocks, IO, PLLs, ADCs).
• Model circuits in Verilog-A/AMS, Verilog, and/or SystemVerilog.
• Lead and participate in design reviews; collaborate with layout, digital, and test teams.
• Support post-silicon bring-up, debugging, validation, and characterization.
• Maintain thorough design documentation and reproducible, spec-driven workflows.

Requirements

Must-have technical skills and experience are listed first; preferred skills follow.

• Must-have: Proven AMS IC design and verification experience with multiple successful tapeouts.
• Must-have: Experience with BCD and SOI process technologies.
• Must-have: Expert-level Cadence Virtuoso proficiency.
• Must-have: Strong understanding of ESD, device breakdown, and reliability-first design practices.
• Must-have: Hands-on experience with transistor-level design, pre/post-layout simulation, and reliability analyses.
• Preferred: ASIC design experience for biomedical applications.
• Preferred: Familiarity with version control (git, SOS), Linux-based workflows, scripting and automation.
• Preferred: Effective communication, organization, and ability to manage multiple projects; team-oriented and open to feedback.

Education Requirements

MS with 8+ years, or PhD with 5+ years of experience in AMS IC design/verification; multiple successful tapeouts expected. (Degree and years specified in the posting.)

About the Company

Company: Epia Neuro

Headquarters: Alameda, CA, United States

Epia Neuro develops intent-driven neural technology to restore function and independence for people with neurological conditions. Their platform combines implantable neural interfaces, adaptive algorithms, and assistive devices to translate neural intent into real-world actions. Initial focus is stroke-related motor impairment with plans to expand to cognitive decline and other disorders.