Analog/Mixed-Signal (AMS) Design Verification Engineer

Job Title

Analog/Mixed-Signal (AMS) Design Verification Engineer

Role Summary

Work on verification of analog and mixed-signal circuits by developing behavioral models, UVM testbenches, and test cases. Collaborate closely with circuit designers and layout engineers to validate functionality, timing, and integration of AMS blocks into larger systems.

Experience Level

Mid-level. Specific years of experience were not specified in the source.

Responsibilities

Primary responsibilities include:

• Extract modeling specifications from circuit designers and convert them into behavioral models.
• Develop analog/mixed-signal behavioral models in SystemVerilog (and Verilog/Verilog-A as needed).
• Design and implement UVM testbenches and test cases for AMS verification.
• Run simulations, diagnose failures, and work with designers to fix model or design issues.
• Develop timing models in collaboration with layout engineers to support timing closure.
• Determine whether anomalies stem from specifications, models, testbench, or design and drive corrective actions.
• Support integration of composite models into larger models maintained by other teams.

Requirements

Must-have technical skills and experiences:

• Strong SystemVerilog skills for behavioral modeling and RTL-style coding (state machines, adders, multipliers, combinatorial logic).
• Experience developing UVM testbenches and creating comprehensive test cases for verification.
• Familiarity with behavioral Verilog and Verilog-A for modeling analog circuit behavior.
• Practical experience with digital design for mixed-signal control loops and writing Verilog/Verilog-A to control analog blocks (e.g., band-gap, PLL, amplifiers, filters).
• Ability to write thorough test benches for both digital and AMS simulators and to run/debug simulations.
• Deep understanding of timing and constraint handling for mixed-signal designs, including multiple clock domains and clock gating.
• Familiarity with timing closure processes and static timing analysis tools.
• Experience with scan chain vector generation and verification.

Education Requirements

Not specified.

About the Company

Company: Axiom Software Solutions

Engineering and software services firm providing design, verification, and development support for electronics and embedded systems, including analog/mixed-signal design verification, modeling, and related software engineering services for semiconductor and electronics clients.