Analog Layout Engineer

Job Title

Analog Layout Engineer

Role Summary

Join Marvell's Central Engineering group as an Analog Layout Engineer contributing layout implementation for high-speed and precision analog IP used across enterprise, automotive, storage, and networking products. You will collaborate with designers and global teams to convert schematics into verified layouts and support designs through delivery.

Experience Level

Mid-level (no specific years of experience stated).

Responsibilities

Primary responsibilities include implementation, verification, and delivery of analog layouts and supporting the design lifecycle.

• Perform layout implementation and extraction for analog/mixed-signal designs using Cadence Virtuoso and related CAD tools.
• Run simulations and layout verification; iterate with designers to meet specifications.
• Own tasks across the development cycle: floorplanning, cell/block layout, verification, delivery, and post-delivery support.
• Deliver high-speed and precision analog circuits across process nodes and ensure manufacturability.
• Collaborate with global teams across time zones; provide status updates and present technical issues and solutions.
• Act as a technical contributor and mentor within the layout team and broader project teams.

Requirements

Must-have technical skills and professional expectations.

• Proven experience using Cadence Virtuoso or equivalent layout/CAD tools for microelectronic layer implementation.
• Track record delivering high-speed or precision analog circuits; experience across multiple process nodes is preferred.
• Demonstrated ownership of layout tasks from cells to functional blocks or higher-level macros.
• Strong communication skills for cross-functional and cross-time-zone collaboration and presentations.
• Ability to run layout verification, debug issues, and support tapeout and post-delivery activities.
• Eligibility to access export-controlled technology may be required (export license review may apply).
• Nice-to-have: mentoring experience, prior work on mixed-signal IP, familiarity with advanced process design rules.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering or a closely related technical field (graduate or undergraduate); equivalent practical experience will also be considered.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.